As the need for more complex semiconductor packages with increased functionality grows, there is a significant challenge associated with achieving this goal. The challenge is how to increase the routing density necessitated by the increased functionality without impacting other parameters or unduly increasing the package area. The conventional approach to this challenge is to reduce the metal line and space parameters (L/S) and add more routing layers to the package substrate. However, this increases the package area, which results in an increase in potential package warpage. Accordingly, there is a need for systems, apparatus, and methods that improve upon conventional approaches without increasing package area or routing density.
The inventive features that are characteristic of the teachings, together with further features and advantages, are better understood from the detailed description and the accompanying figures. Each of the figures is provided for the purpose of illustration and description only, and does not limit the present teachings.